Problem
In the early 1980s Alpha Omega set out to build a better and less expensive computer for our applications. The AO Z80 Computer was designed for the popular STD-Z80 bus. We needed a wide variety of cards for our STD Bus applications.
Solution
The STD Bus provides an 8-bit data bus. 16-bit address bus and the associated control bus. The address bus limited most systems to a maximum of 64 Kbytes of memory address space. This was too small for many AO applications so we used non-functional lines of the STD Z80 Bus to provide an additional two address lines, expanding address space to 256K bytes.
We produced three processor cards. The CPUA had a memory page map to generate the 18-bit address space for our 256K Dynamic Ram card. A Z80A/B/H CPU was paired with a 9511 32-bit trigonometric or 9512 64-bit floating point Arithmetic processor unit IC and two RS-232 or RS-485 serial I/O channels. The CPUB had a Z80A/B processor, sockets for up to 64K bytes on-board RAM/ROM and two serial ports. The RDM CPU had an 8048 processor plus serial I/O. We also designed a 16-bit 68010 CPU card with 1 Mbyte on-board RAM and a programmable logic controller to synthesize all of the 8-bit STD Z80 bus signals. A prototype card was produced but the board was not manufactured.
We created an "intelligent" floppy disk controller that automatically configured itself to work with 8", 5¼" or 3½" disk drives and automatically worked with single- or dual-sided and single- or double-density diskettes. It carried a Z80A/B/H processor and a NEC 765 disk controller IC. The card had a memory page map that allowed addressing 256 Kbytes of memory on the bus.
AO produced three memory cards. The first was a 64 Kbyte dynamic RAM card. We soon replaced this with our 256K byte dynamic RAM card. This card contained high speed logic and buffers to allow memory access and refresh at bus speeds up to 10 MHz plus parity error detection. The refresh controller circuit eliminated unnecessary refresh cycles to minimize power consumption but guaranteed no refresh failures under any STD Z80 Bus operating conditions. We also produced a static RAM and EPROM/EEROM card with on-board PROM programming power supplies.
We designed the High Speed Math Co-processor Card for applications like PID control loops that needed very high speed calculations. It contained a 74S512 16-bit multiply/divide IC and associated logic. The system CPU card wrote data into specific addresses to initiate multiply or divide operations and then immediately read the result from the board. The card executed the math operation in the time between the last CPU data write and the first data read, with no wait states.
AO designed a variety of STD-Z80 Bus I/O cards.
- Four channel RS232/RS422/RS485 serial I/O
- Two channel RS232/RS485 or current loop serial I/O
- Bidirectional buffered 24-bit parallel I/O
- High power 16 channel relay card (250 VAC 8 Amp, 30VDC 5 Amp, 1/4 horsepower)
- Low power 16 channel relay card (high speed reed relays)
- Encoder interface
- Servo amplifier
- Real time clock with battery back-up
Results
The AO STD-Z80 Bus cards were used in many applications through the 1980s and early 1990s. Our cards were also used by a number of other companies and the US Navy.
